Communication systems often use a power amplifier in combination will) a filter to produce an output signal with desired characteristics. For instance, transceivers in radio frequency (RF) communication systems often use a power amplifier with a filter at its output to produce an output signal within a predetermined transmit band or receive band.
Many communication systems implement such a filter with one or more acoustic resonators. Examples of such acoustic resonator filters include thin film bulk acoustic resonator (FBAR), surface acoustic wave (SAW) resonator, and bulk acoustic wave (BAW) resonator filters. In general, acoustic resonator filters may have several attractive performance characteristics, but they may also suffer from significant shortcomings when operated close to their maximum power handling limits.
FIG. 1A is a schematic diagram of a conventional system 100A comprising a power amplifier and an FBAR filter, and FIG. 1B is a conceptual diagram of another conventional system comprising a power amplifier and an FBAR filter.
Referring to FIG. 1A, system 100A comprises a monolithic microwave integrated circuit (MMIC) 105, an RF matching circuit 110, and an FBAR filter 115, MMIC 105 is connected to RF matching circuit 110 via an inductive circuit L1, typically comprising mutually inductive bondwires. Collectively, the above features constitute a power amplifier (PA) module that receives and amplifies an input RF signal RF_in to produce and output RF signal RF_out.
MMIC 105 comprises multiple gain stages each comprising an amplifier in the form of a field effect transistor (FET). More specifically, a first stage comprises a first amplifier (FET1), a second stage comprises a second amplifier (FET2), and a third stage comprises a third amplifier (FET3). As illustrated by the labels “Area=X”, etc., in FIG. 1A, the size of the FETs in successive stages increases by a factor of eight from the first stage to the third stage. Each of the FETs has a gate receiving an input signal and a drain transmitting an output signal. A first capacitor (C1) is connected between the first and second amplifiers as shown in FIG. 1A, and a second capacitor (C2) is connected between the second and third amplifiers as shown in FIG. 1A. The FETs constituting the first through third amplifiers usually take the form of pseudomorphic high electron mobility transistors (pHEMTs), which are typically formed of gallium arsenide (GaAs). Alternatively, they may use silicon-based technology and bipolar junction transistors or heterojunction bipolar transistors.
RF matching circuit 10 comprises a matching inductor Lm and a matching capacitor Cm, which match the output impedance of MMIC 105 with the input impedance of FBAR filter 115. The components of RF matching circuit 110 are arranged between the output of MMIC 105 and ground, as shown in FIG. 1A.
FBAR filter 115 is typically designed to filter off harmonics or other undesired signals, or to prevent excessive levels from being fed to downstream components. For instance, in a typical application, FBAR filter 115 is disposed between power amplification circuitry and an antenna or switch to prevent undesired harmonics or excessive levels from being fed to the receiver chain of a transceiver.
Referring to FIG. 1B, system 100B comprises an MMIC 105′, an RF matching circuit 110′, and an FBAR filter 115. MMIC 105′ performs a function similar to MMIC 105, except that it contains only two gain stages, labeled “1st Stage” and “2nd Stage”, respectively. Like MMIC 105, the gain stages of MMIC 105′ are typically implemented by FETs. MMIC 105′ further comprises a switch for controlling the transmission of the RF input signal RF_in to MMIC 105′, and a bias circuit for biasing one or both of the gain stages.
An output of the transistor forming the “2nd Stage” is joined together at a first bondpad and eight bandwires are connected from the first bondpad to a second bondpad. The second bondpad is electrically connected to RF matching circuit 110′, which operates similar to RF matching circuit 110, and RF matching circuit 110′ is connected to FBAR filter 115.
In the example of FIGS. 1A and 1B, the FBAR filter may exhibit desirable characteristics such as sharp rolloff, small-size, and minimal variation across temperature. However, at high power levels, its performance may degrade. This degradation may take various forms, of which the following are two examples.
First, at high input power levels the FBAR filter may suffer physical damage, diminishing its overall reliability. Nevertheless, this is a risk that that some users are willing to take in order to achieve desired performance. Second, the FBAR filter tends to exhibit nonlinear distortion when input signal excursions approach the maximum power handling capability of the device.
In general, it is difficult to overcome these shortcomings in a system having the general configuration illustrated in FIGS. 1A and 1B, because the size of the FBAR filter is determined by its passband. In other words, it is not possible to make a larger FBAR filter to distribute the power handling of the filter because such a larger filter would change the passband and rolloff characteristics. Accordingly, the above shortcomings tend to limit the usability of FBAR filters in high power applications.